Re: DeCSS Verilog Source WITH FSM -- Convert to SystemVerilog ?

Subject: Re: DeCSS Verilog Source WITH FSM -- Convert to SystemVerilog ?
From: Adam Krolnik (krolnik@lsil.com)
Date: Wed Feb 20 2002 - 13:00:58 PST

>Could someone examine it and see ...
Good luck!

#!/usr/bin/perl -w
# 531-byte qrpff-fast, Keith Winstein and Marc Horowitz
<sipb-iap-dvd@mit.edu>
# MPEG 2 PS VOB file on stdin -> descrambled output on stdout
# arguments: title key bytes in least to most-significant order
$_='while(read+STDIN,$_,2048){$a=29;$b=73;$c=142;$t=255;@t=map{$_%16or$t^=$c^=(
$m=(11,10,116,100,11,122,20,100)[$_/16%8])&110;$t^=(72,@z=(64,72,$a^=12*($_%16
-2?0:$m&17)),$b^=$_%64?12:0,@z)[$_%8]}(16..271);if((@a=unx"C*",$_)[20]&48){$h
=5;$_=unxb24,join"",@b=map{xB8,unxb8,chr($_^$a[--$h+84])}@ARGV;s/...$/1$&/;$
d=unxV,xb25,$_;$e=256|(ord$b[4])<<9|ord$b[3];$d=$d>>8^($f=$t&($d>>12^$d>>4^
$d^$d/8))<<17,$e=$e>>8^($t&($g=($q=$e>>14&7^$e)^$q*8^$q<<6))<<9,$_=$t[$_]^
(($h>>=8)+=$f+(~$g&$t))for@a[128..$#a]}print+x"C*",@a}';s/x/pack+/g;eval

Here's a formatted version I spent about 5 minutes on - pretty clear,
huh!

while(read+STDIN,$_,2048)
  {
  $a=29;
  $b=73;
  $c=142;
  $t=255;
  @t=map { $_%16 or $t ^= $c
           ^= ($m=(11,10,116,100,11,122,20,100)[$_/16%8]) & 110;
           $t ^= (72, @z=(64,72, $a^=12*($_%16 -2 ? 0 :$m&17)),
                  $b^=$_%64?12:0,@z
                 )[$_%8]
         } (16..271);
  if((@a=unpack "C*",$_)[20] & 48)
    {
    $h =5;
    $_= unpack b24 , join"",@b=map{pack B8,unpack
b8,chr($_^$a[--$h+84])}@ARGV;
    s/...$/1$&/;
    $d= unpack V,pack b25,$_;
    $e=256 | (ord$b[4])<<9 | ord $b[3];
    $d=$d>>8^($f=$t&($d>>12^$d>>4^$d^$d/8))<<17,
    $e= $e >>8 ^ ($t&($g=($q=$e>>14&7^$e)^$q*8^$q<<6) <<9,
    $_=$t[$_]^ (($h>>=8)+=$f+(~$g&$t))
      for @a[128..$#a]
    }
  print +pack "C*", @a
  }

   Adam Krolnik
   Verification Mgr.
   LSI Logic Corp.
   Plano TX. 75074

This archive was generated by hypermail 2b28 : Wed Feb 20 2002 - 13:02:13 PST