Subject: Re: FSM Section Vote?
From: Alec Stanculescu (alec@fintronic.com)
Date: Tue Apr 02 2002 - 20:57:53 PST
> >AMENDED PROPOSAL: Remove the State Machine Section (section 9 in draft 4)
> >from the SystemVerilog 3.0 LRM, and defer transition statement and
> >operators for consideration in SystemVerilog 3.1.
> >
> >I vote YES, as amended.
I ABSTAIN on this amended proposal.
Alec
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