Assertions spec available for review


Subject: Assertions spec available for review
From: David Lacey (dlacey@rsn.hp.com)
Date: Sat Apr 06 2002 - 08:54:58 PST


Attached you will find the current version of the Assertion
Specification that will be included in the System Verilog spec. We
still have some cleanup to do on the document, but felt that it would be
good to get it out to the SystemVerilog group for review as soon as
possible.

You can find the spec at:
http://www.eda.org/assertion/docs/SUPERLOG_DAS_1.8_Accellera_final.pdf

David and Tom



This archive was generated by hypermail 2b28 : Sat Apr 06 2002 - 09:00:29 PST