Subject: FW: Assertions spec available for review
From: Vassilios.Gerousis@Infineon.Com
Date: Wed Apr 10 2002 - 04:15:02 PDT
The assertion committee has approved the assertion constructs for SystemVerilog.
You can download it from the link below. Please prepare to discuss this as well
as Draft 6 on next conference call.
-----Original Message-----
From: David Lacey [mailto:dlacey@rsn.hp.com]
Sent: Saturday, April 06, 2002 6:55 PM
To: vlog-pp@eda.org
Subject: Assertions spec available for review
Attached you will find the current version of the Assertion
Specification that will be included in the System Verilog spec. We
still have some cleanup to do on the document, but felt that it would be
good to get it out to the SystemVerilog group for review as soon as
possible.
You can find the spec at:
http://www.eda.org/assertion/docs/SUPERLOG_DAS_1.8_Accellera_final.pdf
David and Tom
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