26th Verilog++ Meeting Minutes 5/6/02


Subject: 26th Verilog++ Meeting Minutes 5/6/02
From: Dave Kelf (davek@co-design.com)
Date: Mon May 06 2002 - 10:10:16 PDT


26th Verilog++ Committee Meeting Minutes
May 6th, 2002
Vassilios leading, Davek taking minutes

ATTENDANCE
(aaaaaaaaaaaaaaa-aaaaaaaaaa) Vassilios Gerousis *
(aaaaaa-aaaraaa-aaarar-aaaa) Dave Kelf *
(----------------aaa--aaaa=) John Sanguinetti
(aaaaaaaaaaaaaaaaa--a-aa---) Dennis Brophy *
(aaaaaaaa-aaaaaaaaaaaaaaaaa) Stu Sutherland *
(-a---------a--------aaaaa=) David Knapp
(-aaaaaaaaa--aaaaaraaar-aaa) Tom Fitzpatrick
(----------a-arraa-aaaaaaa=) Phil Moorby
(-aaaaaaa-aaa-aaaa-aaaaaaaa) Anders Nordstrom
(aaaaaaa--aaaaaa--a-aaaaaaa) Cliff Cummings *
(aaaaa--aaaaaaaaraaa-aaaaaa) Simon Davidmann *
(aaaaaaaaaaaaaaaaaaaaaa====) Peter Flake *
(-aaaaaa-a--aaaa-aaaaa-aaaa) Stefen Boyd
(-aaaaa---aaaaaaaaaaaaaaaaa) David Smith
(aaaaa-aa-aaa-aaa--a-a--aa=) Mike McNamara *
(aaaaaaaaaaaaaaaaaaa=======) Kevin Cameron *
(-aaaaa-aaaaa-a-aa-a=======) Andy Tsay
(aa-aaaaaaaa-aa============) Alec Stanculescu *
(-a-aa-aa----a=============) Adam Krolnik
(aaa-aaaa-aaa==============) Paul Graham *
(-----------a==============) David Seifert
(-------a==================) Alex Zamfirescu
(aa========================) Jayant Nagda *
(--========================) Karen Pieper
(-a========================) Erich Marschner
(-a========================) Prakash Narian

AGENDA

Review SystemVerilog Draft 8
Review 3.1 List

MINUTES

Document Review
Paul will send further clarification email Stu
Paul: Section 3.7 structures must always use ifdef - could be worded
differently
Paul: Inefficient to copy large structures - is this required?
Paul: Section 4.2 packed/unpacked arrays issues with whether array elements
are signed
ACTION Paul to send clarification email
Cliff: Comment on some notes that could be in the BNF itself. Will send
clarification email
ACTION Cliff to send email on this.
Peter: Sent some odd typos, etc to Stu already.

Vassilios: Document sent to the board last week for their review. We need
to have a completely clean document for completion, so please everyone read
the document. For just odd typos please email Stu directly. For sentence
changes please copy the committee

Dave: The Accellera board will be voting in a month. For he folks on the
committee who are in companies that hold a board seat, please make sure
your board member is up to speed with the committee's work and make sure
they have your opinion noted as they look at this.

3.1 Action List
We looked at the current list and talked briefly about whether its contents
should change.
Current list is:
a. Deprecation follow on
b. Time precision and timescale in general
c. Data Channels
d. Pointers
e. Force Release extensions for strength etc
f. State Machines
g. Extern modules
h. Object Orientation
i. Datapath enhancements
j. Interfacing to "foreign" languages - e.g. VHDL and C/C++
k. Alias capability
l. Inheritance and Inferred Declarations
m. Hierarchical and multi-clock FSMs
n. Dynamic process naming and control

Vassilios has suggested adding more efficient interfacing to C, similar to
j above
Cliff suggested adding consideration for alternative methods for declaring
(or not) one bit regs, regs in general, etc
Jayant (I think) mentioned the need to consider temporal logic. This must
be considered alongside the various other committees also involved in this
area, but should be at least discussed by this group
Cliff noted that David Knapp once discussed the use of GoTo and its
importance for synthesis
Dennis brought up possible PLI inclusions, and then need for consideration
of better event control and DSM issues requiring improved PLI functionality

o. C interfacing
p. reg declarations
q. Temporal Logic
r. GoTo
s. Should we look at PLI?

This will list will be discussed at the up coming face to face meeting

NEXT MEETING
We will go back to our regular two week meeting intervals from now.
Next meeting will be on Monday 20th May at 9:00PST, 12:00EDT, 5:00BST, 6:00
Euro Central Time
Call In number 1 405 244 5555 access code 3715

For the face to face meeting, we thought it would be worth inviting members
of some other committees:
David Knapp should be asked to rejoin to talk about GoTos
Steve Wadsworth and Ted Elkind should be invited from the ASIC group.

Thanks Everyone.
______________________________

Dave Kelf
VP Marketing
Co-Design Automation, Inc.

Tel: 1 877 6 CODESIGN ext 404
Mobile: 1 617 571 9883
Fax: 1 781 662 2281
Email: davek@co-design.com
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"Faster, Smarter Verilog"
______________________________



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