Accellera Open Membership Meeting at DAC


Subject: Accellera Open Membership Meeting at DAC
From: Dennis Brophy (dennisb@model.com)
Date: Fri May 31 2002 - 17:58:32 PDT


 
 
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Dennis Brophy
 
Chairman, Accellera
1370 Trancas Street #163
Napa, CA 94558
Phone +1 (707) 251-9977
Fax +1 (707) 251-9877
Email: dennis@accellera.org
 
Accellera Open Membership Meeting at DAC
 
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Dear Verilog++ Committee,
 
On behalf of Accellera, I would like to personally invite you to our annual
open membership meeting with a discussion on Design Language Standards at
the Design Automation Conference (DAC) in New Orleans ( www.dac.com
<http://www.dac.com/> ).
 
Accellera, an electronics industry organization driving the development of
language-based standards for electronic design will provide update about
popular language standards efforts, including background information,
supporters a standardization timeline and pointers to resources.
Participants will also answer the question: When can users begin to use the
standards?
 
To reserve a place, please visit www.accellera.org/calendar.html
<http://www.accellera.org/calendar.html> or contact Lynn Horobin at
Lynn@Accellera.org <mailto:Lynn@Accellera.org> . If you are attending DAC,
I look forward to seeing you there.
 
Best regards,
 
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Dennis Brophy, Chairman
 
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What: Accellera Open Membership Meeting
                  Discussion on Accellera's Design Language Standards
 
When: Wednesday, June 12th, 10:00am - 11:30am
 
Where: Room 257, Ernest N. Morial Convention Center, New Orleans
 
Who: The meeting is open to all DAC attendees and press.
 
About The Standards Discussion:
 
                  Organizer & Moderator:
                  Shrenik Mehta, Accellera Officer & Sun Microsystems' Sr.
Engineering
                  Manager, Global Testability, Tools and Validation
 
                  Discussion Topics:
                  Where Are Standards Headed? - Dennis Brophy,
Accellera Chairman
                  Accellera's Roadmap -
Vassilios Gerousis, Accellera Technical Committee Chairman
                  SystemVerilog -
Dave Kelf, Accellera Technical Committee Co-Chairman
                  Assertions -
David Lacey, Accellera Technical Committee Chairman
                  Formal Property Language - Harry
Foster, Accellera Technical Committee Chairman
                  Interface Technical Committee - Brian Bailey,
Accellera Technical Committee Chairman
                  Rosetta
- Perry Alexander, Accellera Technical Committee Chairman
                  Open Discussion, Q&A - All
 

 



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