Accellera Day Videos from DVCon U.S. 2020 Available!

Tutorial: Portable Stimulus: What's Coming in 1.1 and What it Means for You
This technical tutorial provides an overview of the proposed PSS 1.1 standard. Presenters review the basic modeling constructs, use model and test realization specifications in a PSS verification intent model and show the enhanced capabilities being implemented for 1.1. View the tutorial >

Luncheon Panel focused on the Portable Stimulus Standard
As a follow-up to the tutorial on the Portable Stimulus Standard (PSS), attendees were given the opportunity to interact with members of the Portable Stimulus Working Group and ask their most pressing questions. Listen to the panel discussion >

Short Workshop: An Introduction to the Emerging IP Security Assurance Standard
The workshop, presented by members of the IP Security Assurance Working Group focuses on:  Methodology, detailing the overall concept and workflow along with the individual components, dependencies, and assumptions; Security weakness knowledge base, highlighting potential IP security concerns; OpenCores examples to demonstrate how the methodology applies to real IP cores; Summary and outlook, providing the road map and expectations moving forward. View the workshop >

Short Workshop: How HLS and SystemC is Delivering on its Promise of Design and Verification Productivity
The workshop begins with an introduction to the SystemC Synthesizable Subset and an introduction to basic concepts of how HLS works to go from a SystemC/C++ description to quality RTL. Real-world use-cases and the results achieved are presented by Intel and NVIDIA. View the workshop >

Video from DAC 2020 Now Available

Accellera’s Functional Safety Working Group Addresses Standardization Efforts to Improve Automation, Interoperability, and Traceability

Accellera’s Functional Safety Working Group (FSWG) presented an overview at the virtual 57^th Design Automation Conference of the scope, needs, and goals defined by the FSWG, including developments since its formation.

Introductions by Lu Dai, Accellera’s Chair, Martin Barnasconi, Technical Committee Chair, and Alessandra Nardi, FSWG Chair, were followed by informative presentations by functional safety experts focusing on specific perspectives, challenges, and opportunities.

Speakers include Bala Chavali, AMD; Ghani Kanawati, Arm; Jyotika Athavale, Intel; Franck Galtié, NXP Semiconductors; and Riccardo Vincelli, Renesas. The lively and Q&A session following the presentations is also available as part of the recording.

View the video >