RE: [sv-bc] Proposal for compatibility problems with mixed Verilog/SystemVerilog code

Geoffrey,

I would be glad to add Verilog-AMS to the proposal. There will likely be
some other friendly amendments to make when the proposal is discussed today,
and I will bring this up in the same meeting. An alternative might be that
The P1800 standard includes the compatibility modes I have proposed, and the
Verilog-AMS standard extends the list of modes to cover the AMS standard.

There was no attachment to the e-mail I received from you with the
Verilog-AMS keywords list. Can you please resend that list(s) to me?

Thanks,

Stu
~~~~~~~~~~~~~~~~~~~~~~~~~
Stuart Sutherland
stuart@sutherland-hdl.com
+1-503-692-0898
  

> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On
> Behalf Of Geoffrey.Coram
> Sent: Tuesday, November 30, 2004 4:54 AM
> To: stuart@sutherland-hdl.com
> Cc: sv-bc@eda.org; verilog-ams@eda.org
> Subject: Re: [sv-bc] Proposal for compatibility problems with
> mixed Verilog/SystemVerilog code
>
> Stu -
> This is an interesting proposal, which could solve a number
> of headaches. Would you object to extending it slightly to
> include Verilog-AMS keywords, which are a superset of
> 1364-1995 keywords?
>
> I would suggest three new values for "version_specifier":
> "VerilogAMS-2.1" "VerilogAMS-2.2" and "VerilogAMS-latest"
> I have attached a list of additional AMS keywords from the
> most recent Accellera-approved AMS LRMs.
>
> -Geoffrey
>
>
> --
> Geoffrey J. Coram, Ph.D. Senior CAD Engineer
> Analog Devices, Inc. Geoffrey.Coram@analog.com
> 804 Woburn St., MS-422, Tel (781) 937-1924
> Wilmington, MA 01887 Fax (781) 937-1014
>
>
Received on Tue Nov 30 09:04:11 2004