Subject: RE: SystemVerilog - Accellera -vs- IEEE
From: Vassilios.Gerousis@Infineon.Com
Date: Fri Apr 26 2002 - 23:27:44 PDT
Hi Cliff,
It is the policy of Accellera to take all of its standards to IEEE. In the last face to face meeting (after HDLCON) we decided to build 3.1 version first. This allow a period for people
to build tools and come back with issues so that we can resolve them in a quick manner. By this we can produce a reliable version from Accellera called 3.1 to everyone. This release is the one that will go to IEEE. When this is done the Verilog++ committee will disband in favor of the IEEE committee to grow.
Accellera as an organization will track IEEE activities. Accellera sponsored activities within IEEE will be dotted into Accellera TC committee. We continue funding and also we continue the relationship. Accellera has funded and supported all its IEEE activities to help continue its promotion. Accellera paid 75,000 dollars to fund Verilog2001 standard.
When we started this activity, we made all attempts to get members of IEEE for Verilog to be part of these activities. We have offered voting privilege to IEEE members which is only available to Accellera members only. This will allow the transfer for knowledge and also show unity. In fact, IEEE leaders at all levels, are in constant communication with us and we help each other in funding, support and process development. Accellera to me is an extension to IEEE organization which we do offer the best standards to IEEE to own.
In summary you should have attended the meeting at HDLCON.
Please be aware that all communication on this email reflector is available to the public. People do monitor these email reflector.
-----Original Message-----
From: Clifford E. Cummings [mailto:cliffc@sunburst-design.com]
Sent: Saturday, April 27, 2002 2:08 AM
To: vlog-pp@eda.org
Subject: SystemVerilog - Accellera -vs- IEEE
Hi, All -
Could someone explain to me when and how the Accellera SystemVerilog effort
is going to be handed off to the IEEE Verilog Standards Group, chaired by
Mike McNamara?
When we first started, I know we said we wanted to pursue the Accellera
path to get a working Standard in place by DAC 2002 and then we would
pursue the IEEE Standardization effort.
I'm not sure what the relative roles are regarding the Accellera effort
versus the IEEE effort. I thought most of the group intended to move with
the Accellera document over to the IEEE standardization effort. I'm not
sure I want to do both since the IEEE document will likely make additional
changes to the Verilog language.
Is there an intent to complete the 3.1 effort by a certain date and disband
in favor of IEEE picking up the ball?
Is there an intention of doing a version 3.2? 3.3? etc.?
Are dueling committees planned?
Does it make sense to role the Accellera effort into an IEEE committee and
let that committee produce checkpoint Accellera draft documents?
Regards - Cliff
----------------------------------------------------
Cliff Cummings - Sunburst Design, Inc.
14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
Phone: 503-641-8446 / FAX: 503-641-8486
cliffc@sunburst-design.com / www.sunburst-design.com
Expert Verilog, Synthesis and Verification Training
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