[sv-bc] assignment to input

I've opened this as 1573. As soon as this mail arrives to the reflector,
I'll add a link to it to the ticket. 

 

--Yulik.

 

________________________________

From: Bresticker, Shalom 
Sent: Tuesday, August 29, 2006 3:23 PM
To: Feldman, Yulik
Cc: Bresticker, Shalom
Subject: RE: assignment to input

 

I agree that the wording is confusing. One could ask, what does "used as
output" mean?

 

However, the well-known (and unfortunate) behavior is that assignments
to inputs are allowed. For many tools, the significance of the port
direction is limited to the determination of what can be connected to
it, whether just net or also reg. The coercion question affects whether,
if you assign to an input, is this assignment reflected outside the
module as well or just stay inside? A Mantis would be a good idea, I
think, both to clear up the ambiguities, and maybe propose to not allow
this, though it would cause problems with legacy code.

 

Shalom

 

________________________________

From: Feldman, Yulik 
Sent: Tuesday, August 29, 2006 11:25 AM
To: Bresticker, Shalom
Subject: assignment to input

 

Hi Shalom,

 

What do you think, should the assignments to input ports be allowed, or
not? The only relevant reference to that in LRM that I know is in
1364-2005 Section 12.3.8 "Connecting dissimilar ports", which says: "A
port that is declared as input (output) but used as an output (input) or
inout may be coerced to inout. If not coerced to inout, a warning has to
be issued". However, it is not clear whether this section talks about
connections between pairs of ports or about the general usages of ports
in any other constructs, like in continuous assignments. So, it is quite
confusing. Do you think there is a need to open Mantis on this
ambiguity, or I'm missing something?

 

Thanks,

            Yulik.