Subject: FSM Section Vote?
From: Clifford E. Cummings (cliffc@sunburst-design.com)
Date: Tue Apr 02 2002 - 15:28:25 PST
Vassilios -
Did you get the message that we decided to conduct an email vote on the
proposal to remove the FSM section from version 3.0 of the SystemVerilog
Standard? I thought the Co-Design guys were going to ask you to conduct
that vote and that voting would close on Friday, April 5th.
PROPOSAL: Remove the State Machine Section (section 9 in draft 4) from the
SystemVerilog draft standard.
Proposed by: Cliff Cummings
Seconded by: Stu Sutherland (is this correct Stu?)
Regards - Cliff
BTW - my vote is:
Yes - remove the FSM section - Cliff
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