Tutorial: Lessons from the Trenches: Migrating Legacy Verification Environments to UVM

UVM - Universal Verification Methodology

Presented at DVCon U.S. 2013 on February 25, 2013

The Universal Verification Methodology (UVM) is the industry standard verification base class library (BCL) developed within the Accellera System Initiative Verification IP technical subcommittee (VIP-TSC). UVM has been released now for nearly two years and brings the industry together on VIP collaboration and reuse.

All new technologies have end user challenges in terms of migration and/or adoption and UVM is no different. Migrating to UVM from either OVM, VMM, Specman/'e', or other verification BCLs is not always easy. Companies with legacy verification collateral often have to write wrapper environments for other VIPs, write complicated translation scripts, or manually convert code from one methodology to another.

In this UVM migration and adoption tutorial are the real stories from end users who work in the trenches making this conversion magic happen for their teams as they move to UVM.

The tutorial is split into seven sections:

  • Part 1: Anecdotes from Hundreds of UVM Adopters
    John Aynsley, Doulos

  • Part 2: Migrating from OVM to UVM — A Case Study
    Hassan Shehab, Intel

  • Part 3: A Reusable Verification Testbench Architecture Supporting C and UVM Mixed Tests
    Richard Tseng, Qualcomm

  • Part 4: UVM to the Rescue — Path to Robust Verification
    Asad Khan, Texas Instruments

  • Part 5: OVM-to-UVM Migration — or There and Back Again, a Consultant's Tale
    Mark Litterick, Verilab

  • Part 6: IBM Recommendations for OVM-to-UVM Migration
    Wesley Queen, IBM

  • Part 7: FPGA Chip Verification Using UVM
    Charles Zhang, Paradigm Works; Ravi Ram, Altera

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